Michel Heily
fe071bf1ec
Fix timer bugs
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Former-commit-id: 9839368895dca306b66a095ab0b9386c77bd2c12
2019-08-07 09:45:10 +03:00
Michel Heily
c72bbb96fd
[WIP] Timers
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Seems to work, but the cycle's are not accurate so they run slowly
Former-commit-id: a0b80acb4b68ed64caa535a0ec9f75a081d3aed4
2019-08-05 09:53:41 +03:00
Michel Heily
c7dd713605
The big ioregs refactoring.
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This commit refactors the ioregs:
* Use bitfield crate to implement the GPU ioregs.
* IoRegs are stored in their own variables bindings (i.e, Gpu related ioregs are now fields of the Gpu struct)
- This optimize performance quiet alot from my testings - since every scanline was accessing deseralizing ioregs from sysbus. (Getting constant 59fps now)
* For now, comment out DMA model
Also, cleaned the code up to eliminate rustc warnings.
Former-commit-id: 9077695c446ebd1a71783acfdd9819245aa02d7a
2019-08-03 00:24:15 +03:00
Michel Heily
9f0df9af06
optimization: Optimize VRAM accesses from within the gpu.
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Not going through the memory mapping anymore.
Also, this commit wraps the gpu pixeldata with a struct
Former-commit-id: d7b706d9de61bac7909e10d6bbe092968e6acc9f
2019-08-02 18:04:35 +03:00
Michel Heily
eb2a1a02fe
Implement background scrolling!
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tonc's brin_demo.gba now works as intended :)
Former-commit-id: 596c063c5968534f42e42f52203c85262b9c6fa2
2019-07-31 00:52:46 +03:00
Michel Heily
f862209911
Support axis flip for tiles
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Former-commit-id: daefb380ab2dfcee600297690dcc0c7c1a37f911
2019-07-29 09:46:12 +03:00
Michel Heily
90edebbe82
Align to halfword for thumb branch long instructions
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Former-commit-id: f75e4baf003dcb7c535db3692383cc95575dfd81
2019-07-29 01:55:16 +03:00
Michel Heily
e962150aaf
Start working on Interrupts.
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it kinda works now, but needs testing.
Former-commit-id: 8510314cce248a737d492d935cf5b48f86d920ed
2019-07-29 01:28:22 +03:00
Michel Heily
66a484e3ae
Fix mode0 calculation of tile map entries.
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tonc's hello.gba demo now works correctly :)
Former-commit-id: ead3a01e810f69503abbe8bddd0853433862549b
2019-07-27 23:28:00 +03:00
Michel Heily
f39095a03b
Fix thumb conditional branch offset
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Former-commit-id: b42f233b7f2ca5d427b0e36860a305f7e1a26a1d
2019-07-27 21:30:27 +03:00
Michel Heily
df48f307f0
armwrestler-fix: Fix post indexed LDR_STR when rd==rn
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Former-commit-id: b886c969c2d570fbb831eeeddc0f65ad575cfccb
2019-07-27 21:28:43 +03:00
Michel Heily
477b4f45fd
Fix thumb MUL not setting the flags
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Former-commit-id: b43e35a7fa2894fcc5cef7eeae9d74123e40219b
2019-07-27 20:25:59 +03:00
Michel Heily
44426b5f0e
Impl arm SWP
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Also ran some rustfmt
Former-commit-id: 30480e79d7f2926d5a5f15db20427179a672a78c
2019-07-27 20:20:58 +03:00
Michel Heily
e06c77b6fd
armwrestler-fix: Fix MULL_MLAL instructions
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Also fix disassembly for MULL_MLAL
Former-commit-id: f535b2db7edb5d056160699436dbeb0c15e61388
2019-07-27 18:57:20 +03:00
Michel Heily
7429236471
Fix mistake in UMLAL
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Former-commit-id: 6fe9bdf5471b71b58dcf9ee9ffa03c41b24e6301
2019-07-26 17:55:50 +03:00
Michel Heily
1b5626a1a7
armwrestler-fix: Refactor barrel shifter and fix ALU carry flag, hopefully for good.
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Passing most of armwrestler ALU tests (still have bugs in UMULL and
SMULL)
Former-commit-id: 3c57ca9b5360b5c9bba74b00a5bede5a8cc496af
2019-07-26 17:55:50 +03:00
Michel Heily
24483456ed
armwrestler-fix: Fix writeback for LDR where rd==rn
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Instead of returning an Err, the writeback should just be disabled.
Former-commit-id: 91636a4eeaf76d0dbd11d250202671fcf8aaa4e6
2019-07-22 20:33:31 +03:00
Michel Heily
009e46f6d5
armwrestler-fix: Properly handle misaligned addresses LDR/LDRH/LDRSH
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Former-commit-id: 742a7c2b8413fa9d45df1575a0b14b8d1ab697c4
2019-07-22 20:25:40 +03:00
Michel Heily
2a66e525b1
Fix thumb disassembly of LDMIA/STMIA
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Former-commit-id: b04b07f181fff82869503671dd0f500a6c3e5fb1
2019-07-22 09:31:35 +03:00
Michel Heily
2fb6f3c884
Implement (psr / usr bank) transfers for LDM_STM
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Former-commit-id: 140e6a6c75f65f08f645b1a0ff2ca7c065438ce4
2019-07-22 09:21:49 +03:00
Michel Heily
0b5902c52e
Implement special MRS
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Former-commit-id: 1af358887ef71344987f72d65612095c72565f43
2019-07-22 09:21:45 +03:00
Michel Heily
c0d437b1a1
Fix exceptions and dataprocess mode change
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Former-commit-id: 5892131496904b621398212b9dfc077242fa9557
2019-07-22 01:16:48 +03:00
Michel Heily
7501adfd12
Implement thumb17 (Swi)
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Former-commit-id: 62d7e14e9b84e74d9236e1f0a5e961ae805f861c
2019-07-22 01:15:58 +03:00
Michel Heily
eea26d2393
thumb: Change ordering when decoding thumb instruction.
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This fixes a bug where "swi" instructions are decoded as conditional
branches.
The order really matters here, because Swi instructions are actually
conditional branch with illegal condition code.
Former-commit-id: 0024a8b53386a510dd321c157391c99a2af29223
2019-07-22 00:25:26 +03:00
Michel Heily
387e26fad9
Add support for BGMode3 (tonc first.gba example now working)
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Former-commit-id: 52ac773ee2c3542ff3b046c3ea33fde02e804492
2019-07-22 00:09:44 +03:00
Michel Heily
7e9c0e31da
Add minifb backend - Armwrestler now plays !
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Former-commit-id: d72ea9139e04624322cf3bc4a8ab330f6bb133a4
2019-07-20 23:02:18 +03:00
Michel Heily
61e1f055f1
Model the keypad
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Former-commit-id: 4f38fa754e3ee809a7386351297decb2d7f1451f
2019-07-20 22:58:29 +03:00
Michel Heily
53115a9a58
Refactor core functionality into a separate module
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Former-commit-id: 5d55b9eb0b63ed7c61465b4e814782165caa5002
2019-07-20 16:46:00 +03:00
Michel Heily
0f73abaf98
Optimize instructions with "register lists" (LDM_STM)
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These instruction (probably) allocated a vector each time.
Former-commit-id: 66f724e21e1e5d667d19c1f21d2cc4fa3944faac
2019-07-20 16:07:19 +03:00
Michel Heily
7119ba2451
Cpu: Rewrite pipeline code.
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Pipeline code was unreadable up until now, this also fixes a bug:
* Some roms have illegal instructions right after branch instructions, and
the cpu would error trying to decode them because of pipelining.
Former-commit-id: e3201c7b0d2adfc772231a3e2d5909f43c17b50f
2019-07-20 16:03:37 +03:00
Michel Heily
1f074e20ad
Refactor lcd -> gpu
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Former-commit-id: c12be139770922bac55490c76348f5406fc00f07
2019-07-16 01:21:11 +03:00
Michel Heily
876cdfdcb3
Implement MODE4 rendering, ArmWrestler renders now!
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Former-commit-id: 4910a63b454ae9309abc0aa584a7d0bc96143538
2019-07-15 20:49:47 +03:00
Michel Heily
1084be52b8
WIP mode0 rendering
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Former-commit-id: 6bce375f9373bbddf4522da5ecc2ea3584373847
2019-07-15 19:23:16 +03:00
Michel Heily
9d8272b895
Fix wrong use of rust ranges in the lcd.rs module
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Former-commit-id: 73d588299baed7f5206b904f40ecf4a4e5283ef6
2019-07-15 19:09:41 +03:00
Michel Heily
a4925b7233
Fix SP values for "--skip-bios"
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Former-commit-id: d89d3c9c6b5d062137442df4017d59dea047270f
2019-07-15 07:31:29 +03:00
Michel Heily
0500d33cb7
Refactor bus interface
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Former-commit-id: f325cda23f5e9946b367456d82ba71bb92bdd46e
2019-07-15 07:30:52 +03:00
Michel Heily
f08da850c7
thumb: Fix overflowing multiplication
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Former-commit-id: 5dbd45f9fd3811726aad9c32444f0dcf42d0b8be
2019-07-13 23:33:37 +03:00
Michel Heily
ab8c067616
Flush pipelines when entering an exception
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Former-commit-id: c00754b8156ecac66cc0a72f6a7c73ee700448f0
2019-07-13 23:33:10 +03:00
Michel Heily
fb5229705b
Refactor and fix arm condition check
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Former-commit-id: 132c14fc56a21426263971e2d544ff10f072fea1
2019-07-13 23:32:43 +03:00
Michel Heily
1747addcd3
Start modeling the Lcd Display
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Former-commit-id: 544f185c6f9eead870032170292b1cc8afc724bf
2019-07-11 18:17:28 +03:00
Michel Heily
95f45e55a9
arm: Impl MULL_MLAL and fix writeback for post-index memory transfers
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Also some minor fixes and formatting
Former-commit-id: 4929b28cbb4eeeed5acfbdcdd19392ffa3bb0f37
2019-07-11 18:10:58 +03:00
Michel Heily
4763f79abf
arm: Impl MLA
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Former-commit-id: fe2c836bd09af165381537445dd288ca7bac24ce
2019-07-11 00:02:39 +03:00
Michel Heily
5bc4c79d6e
arm: Implement MRS
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Former-commit-id: 8c1528b2bcd08096f929c4ee940f1a1f5eac2911
2019-07-10 23:54:45 +03:00
Michel Heily
5f625b2209
Add special case for MSR immediate
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Former-commit-id: f9fabb3c0d7c05243866b712096c2c82cf41672d
2019-07-10 23:48:14 +03:00
Michel Heily
a9bf2d25e0
arm: Implement Arm MSR_FLAGS
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Former-commit-id: 64d2cf255304ecca02dadc55266d22bc1f92bb4c
2019-07-10 22:35:40 +03:00
Michel Heily
4c3379615a
Fix bug in RRX (defined "old_carry" after changing it >< )
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Former-commit-id: b890d40bb57da1cc6b63d6436bc8f346131fa5bc
2019-07-10 22:35:40 +03:00
Michel Heily
50086a8715
Fix word alignment for arm BX
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Former-commit-id: 9223259793cd8ecccb02b40c428d32315c632bff
2019-07-10 22:35:40 +03:00
Michel Heily
2864f83681
Arm: Partially implement MUL
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Former-commit-id: 3b37f5cbe327e15be4cee56572c2230dbda48082
2019-07-10 22:35:40 +03:00
Tamir
543161d6b8
Fix cli help lines to all follow the same structure
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Help lines all start with a capital letter and don't end with a dot
Former-commit-id: 31e65514d15540538e2de528810957e16c8b5090
2019-07-10 12:59:48 +03:00
Michel Heily
92f65794d8
Fix writeback for Thumb LdmStm
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Former-commit-id: 00a15dc99716290da7b260b261090454d621ce8a
2019-07-09 02:20:32 +03:00