Commit graph

24 commits

Author SHA1 Message Date
Michel Heily
6beec306c2 optimize: CPU Pipeline optimization part 2
Optimize redundent pipeline stages
About 5% performance gain.

Also rustfmt..


Former-commit-id: 2f5fc95798e97eb963fea976866bbeaf637084b0
2020-02-11 02:26:17 +02:00
Michel Heily
1f79205f51 optimize: CPU Pipeline optimization part 1
In preperation for later optimization in the CPU pipeline
implementation, this commit refactors the arm/thumb exec functions to return a
CpuAction (Whether to advance the program counter or to flush the
pipeline)

Currently, a lot of host cycles are wasted in the arm7tdmi pipeline
Refill1 & Refill2 states. Optimizing these steps out would make the CPU
a bit faster.


Former-commit-id: 9be7966eaad22cceeb443fcc5823bbd945284027
2020-02-11 02:26:17 +02:00
Michel Heily
ae7bf63d3f arm7tdmi/optimize: Optimize and cleanup CPU, roughly about 10% fps improvement.
This commit removes the error handling (CpuResult<>) in order to reduce
overhead in the cpu implementation.
Also, some cleanup of warning messages.

Notice: this commit breaks '--feature debugger' for now

Former-commit-id: d4484047c3f5d509eff89cef7090aa88b07a8d17
2020-02-09 20:17:46 +02:00
Michel Heily
984cb2f0c4 chore: rust-fmt
Former-commit-id: 8bb31056864e64bcad6877f3c2c1000464cce82e
2020-02-07 17:16:52 +02:00
Michel Heily
ec0e796536 core: arm7tdmi: thumb: Reduce branches in exec functions
Former-commit-id: 69493480eddee066bc4812c4c1abd6c520a00231
2020-01-17 16:11:43 +02:00
Michel Heily
70c72bec2f fix(tests): Fix thumb t230
THUMB 15: Base in rlist


Former-commit-id: 2516b67308e2605414f691009ce000adafda1f49
2020-01-17 13:07:26 +02:00
Michel Heily
5b90223717 fix(tests): Fix thumb t225
THUMB 14: Push / pop do not align base


Former-commit-id: e8f511387edf5bd2f3991558f7757f997d0289c7
2020-01-17 13:04:14 +02:00
Michel Heily
36cf4e62ce core: arm7tdmi: optimization: split flush_pipeline to arm and thumb
Reduces an if check


Former-commit-id: 4380c54f86238ef8818356f4593f59277f055fa6
2020-01-11 16:12:54 +02:00
Michel Heily
b00fbfb38c gpu: refactor: Big refactor preparations
1) Decouple SysBus from Gpu
2) Split Gpu rendering function into separate modules
3) Cleanup


Former-commit-id: 0435ad1c9c1de72ed50769fabfea7c5f33b670e0
2019-12-29 23:44:34 +02:00
Yonatan Goldschmidt
7cfa4bb07d Remove some unused imports
Former-commit-id: 64bd0e7419cd374f6321fcc3bd9fdee7a241592b
2019-12-20 15:11:26 +02:00
Michel Heily
3c3129c73c Minor fixes
Fix LSR integer underflow.
Change SWI LR calculation


Former-commit-id: 6a298719e380c3a01f70c3b05d9f3507638398d5
2019-11-20 05:04:54 +02:00
Michel Heily
7e98af80c2 Fixes to ALU, passing mGBA carry tests
Former-commit-id: 14a4293b2511c7c63a920e6344e89b209ca7c5ee
2019-11-16 18:17:53 +02:00
Michel Heily
1d088accb8 mGBA test suite now boots!
Fix tons of bug and reimplemented some of the core code.
Add a neat feature for debug builds:
When the cpu "swi 0x55" instruction, a breakpoint is triggered on the
host.


Former-commit-id: 959249df4374327d90b2503d7a45f8d5d27995a6
2019-11-12 18:22:00 +02:00
Michel Heily
3a1d5c10ce Fix many bugs, refactor many things..
Passing: Armwrestler, cpu_test by Dead_Body

Former-commit-id: 80d815d110c5341515dd01c476a0d7e25ecb66a8
2019-11-09 01:06:24 +02:00
Michel Heily
fa211fa77e Fix thumb NEG instruction. Finally pass armwrestler!
This one took me quite a bit. :/


Former-commit-id: f08537dda5a62076c3faff31a898c0a585102526
2019-09-10 01:01:49 +03:00
Michel Heily
acd0e4f338 cpu: Refactor instructions to use explicit cycle counting.
The way cycles were counted up untill now was not accurate enough,
I've avoided doing so because the instruction implementation looks
bloated this way, but I've had problems with cycle accuracy with tonc's
timer demo.

This is not entirely correct though, and I'm 100% sure there are some
mistakes, but works good enough for now.


Former-commit-id: 748faaf99fe2f42925c0a2110192c6a01e5d27d4
2019-08-08 20:05:09 +03:00
Michel Heily
c7dd713605 The big ioregs refactoring.
This commit refactors the ioregs:
* Use bitfield crate to implement the GPU ioregs.
* IoRegs are stored in their own variables bindings (i.e, Gpu related ioregs are now fields of the Gpu struct)
  - This optimize performance quiet alot from my testings - since every scanline was accessing deseralizing ioregs from sysbus. (Getting constant 59fps now)
* For now, comment out DMA model

Also, cleaned the code up to eliminate rustc warnings.


Former-commit-id: 9077695c446ebd1a71783acfdd9819245aa02d7a
2019-08-03 00:24:15 +03:00
Michel Heily
90edebbe82 Align to halfword for thumb branch long instructions
Former-commit-id: f75e4baf003dcb7c535db3692383cc95575dfd81
2019-07-29 01:55:16 +03:00
Michel Heily
f39095a03b Fix thumb conditional branch offset
Former-commit-id: b42f233b7f2ca5d427b0e36860a305f7e1a26a1d
2019-07-27 21:30:27 +03:00
Michel Heily
477b4f45fd Fix thumb MUL not setting the flags
Former-commit-id: b43e35a7fa2894fcc5cef7eeae9d74123e40219b
2019-07-27 20:25:59 +03:00
Michel Heily
1b5626a1a7 armwrestler-fix: Refactor barrel shifter and fix ALU carry flag, hopefully for good.
Passing most of armwrestler ALU tests (still have bugs in UMULL and
SMULL)


Former-commit-id: 3c57ca9b5360b5c9bba74b00a5bede5a8cc496af
2019-07-26 17:55:50 +03:00
Michel Heily
009e46f6d5 armwrestler-fix: Properly handle misaligned addresses LDR/LDRH/LDRSH
Former-commit-id: 742a7c2b8413fa9d45df1575a0b14b8d1ab697c4
2019-07-22 20:25:40 +03:00
Michel Heily
7501adfd12 Implement thumb17 (Swi)
Former-commit-id: 62d7e14e9b84e74d9236e1f0a5e961ae805f861c
2019-07-22 01:15:58 +03:00
Michel Heily
53115a9a58 Refactor core functionality into a separate module
Former-commit-id: 5d55b9eb0b63ed7c61465b4e814782165caa5002
2019-07-20 16:46:00 +03:00
Renamed from src/arm7tdmi/thumb/exec.rs (Browse further)