Commit graph

65 commits

Author SHA1 Message Date
Michel Heily
fb93ebb4ed feat/arm7tdmi_dispatch_table: Done!
Moved away from using lazy_static for this one since every access to a
lazy_static reference adds a runtime check, Currently using a build.rs script to generate a const table instead.

Worked out the ARM decoding issues, seems to run fine now.

Though the dynamic decoding for ARM is broken now since I had to change things in Data Processing and MSR instructions

TODO use `const fn` when it becomes stable


Former-commit-id: ba09748ff74a403c7016adcbe0ca553b591f6855
2020-04-07 02:31:13 +03:00
Michel Heily
ad232227c1 Refactor ARM format names
Former-commit-id: b99e03669e2c1ccadbd13d2f06eb7127e2145f2b
2020-04-07 02:30:22 +03:00
Michel Heily
a523a37d32 [WIP] Start working on arm7tdmi dispatch table.
Lookup tables are generally faster than matching in most architectures.
There is some trouble in decoding some arm data processing instructions
so this is non-default feature for now

* Crashes on armwrestler but many games seem to work


Former-commit-id: 3c06ea344ae0097947d8cd5bd05b1f882c7f743a
2020-04-07 02:30:22 +03:00
Michel Heily
f0aa671674 optimize/cpu: Pass Arm/Thumb Instruction and other large structs as references.
Also, get rid of unnecessary derive Copy.

Since the ArmInstruction (and Thumb) derived from Copy, the compiler
always saves them to the stack when they are passed by value to other
functions, thus making some unwanted performance overhead.

I removed the derive Copy, and also pass them as references. This
project has a lot of "derive Copy" everywhere, and I should take note if
this is happenning elsewhere aswell.


Former-commit-id: 2f94c6050fa26c5b777244bd26706d4e6e2f0dc9
2020-03-28 16:14:59 +03:00
Michel Heily
2af9249a6c optimize/arm: Force inlining.
This functions were not inlined by the optimizer


Former-commit-id: aa02a3f5e6d33f16c298bc655c8d3a244c2ef946
2020-03-28 16:14:59 +03:00
Michel Heily
d9ce1c7d8d optimize/arm: Improve arm instruction condition check.
Obviously AL(always) instructions are the most common, so prioritize checking these first.


Former-commit-id: e236f1e116dbf65757a68dda9090645d220a1cee
2020-03-28 16:14:59 +03:00
Michel Heily
c50ab1ecd8 feat: Add basic gdbserver feature
Initially I began implementing the gdb protocol on my own, but I then found a
nice work-in-progress crate on https://github.com/daniel5151/gdbstub
that suited my needs.


Former-commit-id: f77557cbbd8652c2ed05ac439efc1956d8e99729
2020-02-21 22:12:58 +02:00
Michel Heily
b03fe3567e Fix all warnings during build
Ran cargo-fix to automatically fix most of the build warnings,
Cleaned up dead code, and fix the rest manually


Former-commit-id: f35faba46b40eaf9c047efb8ab1e77ffa24d41b6
2020-02-14 14:21:45 +02:00
Michel Heily
0c2da2ae46 refactor: Refactor instruction decoding to panic instead of returning a Result
flamegraph shows too much time is being spent 'unwraping' decoded
instructions


Former-commit-id: e89072e6cf648e83f87d8c01891f50474246a36b
2020-02-14 13:05:14 +02:00
Michel Heily
32a20d2cbb ptimize: CPU Pipeline optimization part 3
Move reload_pipeline calls inside instructions.
This commit yeilds yet another 5% performance improvment.

The next step is to move `advance_pc` into the instructions themselves
and save the `match result` per executed instruction


Former-commit-id: 42193ffc48fda9943665e6a74e873186627a0b4a
2020-02-11 02:26:17 +02:00
Michel Heily
6beec306c2 optimize: CPU Pipeline optimization part 2
Optimize redundent pipeline stages
About 5% performance gain.

Also rustfmt..


Former-commit-id: 2f5fc95798e97eb963fea976866bbeaf637084b0
2020-02-11 02:26:17 +02:00
Michel Heily
1f79205f51 optimize: CPU Pipeline optimization part 1
In preperation for later optimization in the CPU pipeline
implementation, this commit refactors the arm/thumb exec functions to return a
CpuAction (Whether to advance the program counter or to flush the
pipeline)

Currently, a lot of host cycles are wasted in the arm7tdmi pipeline
Refill1 & Refill2 states. Optimizing these steps out would make the CPU
a bit faster.


Former-commit-id: 9be7966eaad22cceeb443fcc5823bbd945284027
2020-02-11 02:26:17 +02:00
Michel Heily
7736154b50 fix: Use flush_pipeline16 when branch exchange changes CPU to thumb mode
Former-commit-id: 6f9c01c6f7ad7be2889a18ca66f7d310fcaa7c35
2020-02-11 02:26:17 +02:00
Michel Heily
1a46bec3f9 feat: Fix & improve debugger, Add commands to save/load the state
Former-commit-id: cfbead1ad64c8b029bf7265f7fd975014744b287
2020-02-11 02:26:17 +02:00
Michel Heily
ae7bf63d3f arm7tdmi/optimize: Optimize and cleanup CPU, roughly about 10% fps improvement.
This commit removes the error handling (CpuResult<>) in order to reduce
overhead in the cpu implementation.
Also, some cleanup of warning messages.

Notice: this commit breaks '--feature debugger' for now

Former-commit-id: d4484047c3f5d509eff89cef7090aa88b07a8d17
2020-02-09 20:17:46 +02:00
Michel Heily
984cb2f0c4 chore: rust-fmt
Former-commit-id: 8bb31056864e64bcad6877f3c2c1000464cce82e
2020-02-07 17:16:52 +02:00
Michel Heily
99cf07c391 chore: Replace trace exception with trace!
Former-commit-id: 0b6f2126a6861b8f31f5231b5e0cfda3df30d5d5
2020-02-01 12:21:42 +02:00
Michel Heily
451be2036f feat(logger): Replace various println! with logs
Former-commit-id: c2f38f863d65c4564f4d2169e63714a2925a4d3f
2020-01-31 16:15:29 +02:00
Michel Heily
a47cb18cda core/arm7tdmi/arm/: Fix wrong calculation of op1 in DATA_PROCESSING instruction when RN==R15
The docs state: "If a register is used to specify the shift amount the PC will be 12 bytes ahead"
I probably misread that when implementing DataProcessing instructions,
and because of that added 4 bytes to (op1+8) when shift amount was specified by a rotated immediate.

Fixes  (and probably tons of other bugs too!)


Former-commit-id: 129f0951a6381221314c23a468c3da8b31435a30
2020-01-18 23:46:47 +02:00
Michel Heily
ec0e796536 core: arm7tdmi: thumb: Reduce branches in exec functions
Former-commit-id: 69493480eddee066bc4812c4c1abd6c520a00231
2020-01-17 16:11:43 +02:00
Michel Heily
40de6bf893 core: arm7tdmi: Align PC according to current ISA state
Former-commit-id: 049f01247f3fcc429f07e1761ceed25e749ce77e
2020-01-17 16:11:43 +02:00
Michel Heily
9cc293fb02 fix(tests): Fix all arm tests
Former-commit-id: a3138584636cc34115207dc6a7b52cf175da187a
2020-01-17 13:10:26 +02:00
Michel Heily
70c72bec2f fix(tests): Fix thumb t230
THUMB 15: Base in rlist


Former-commit-id: 2516b67308e2605414f691009ce000adafda1f49
2020-01-17 13:07:26 +02:00
Michel Heily
5b90223717 fix(tests): Fix thumb t225
THUMB 14: Push / pop do not align base


Former-commit-id: e8f511387edf5bd2f3991558f7757f997d0289c7
2020-01-17 13:04:14 +02:00
Michel Heily
1d7035b600 core: arm7tdmi: Comment out old tests for now
Former-commit-id: 01bfe52e513de9decb1a20e2e1d501b564f981b5
2020-01-17 01:15:51 +02:00
Michel Heily
f4460b2740 feat/savestates: Implement save/load state API for GameBoyAdvance
Using serde & bincode encoding


Former-commit-id: f5e4c599497f6bdf3096fa99f8b2d6ce89278ef7
2020-01-16 20:18:32 +02:00
Michel Heily
36cf4e62ce core: arm7tdmi: optimization: split flush_pipeline to arm and thumb
Reduces an if check


Former-commit-id: 4380c54f86238ef8818356f4593f59277f055fa6
2020-01-11 16:12:54 +02:00
Michel Heily
b00fbfb38c gpu: refactor: Big refactor preparations
1) Decouple SysBus from Gpu
2) Split Gpu rendering function into separate modules
3) Cleanup


Former-commit-id: 0435ad1c9c1de72ed50769fabfea7c5f33b670e0
2019-12-29 23:44:34 +02:00
Michel Heily
fefeddbc40 Continue working on DMA sound.
Cleanup timer.rs
run cargo fmt
restore debugging continue&frame commands
Fix bug introduced in previous commit causing the bios animation to
hang


Former-commit-id: 188acaa1121503a97f2d3be816f6f57835e17fe1
2019-12-23 01:37:45 +02:00
Yonatan Goldschmidt
7cfa4bb07d Remove some unused imports
Former-commit-id: 64bd0e7419cd374f6321fcc3bd9fdee7a241592b
2019-12-20 15:11:26 +02:00
Michel Heily
cb36db688e Fix LSR#0
Former-commit-id: 7cfcc0b8f6e0849c9090148f2cc381b3419abd39
2019-12-20 15:06:21 +02:00
Michel Heily
3c3129c73c Minor fixes
Fix LSR integer underflow.
Change SWI LR calculation


Former-commit-id: 6a298719e380c3a01f70c3b05d9f3507638398d5
2019-11-20 05:04:54 +02:00
Michel Heily
49ef59b8e9 fixup! Improve the debugger
Former-commit-id: 9ca33bd4f8273a6be66cec6a8218664a7aada376
2019-11-16 18:48:24 +02:00
Michel Heily
46931a1f6a Fix CPU bugs, KIRBY BOOTS!
- Bad LSR emulation caused an edge-case making allmost all of the game I tested fail to boot past intro.
- Incorrect sign extension of offset5 in THUMB caused bad address calculation.

Kirby boots with rendering glitches, I played past the first 2 boses
without crashes.


Former-commit-id: 8ea0ad6eb0f70e6dc23d1f2fcc44c8c0b3448fba
2019-11-16 18:17:53 +02:00
Michel Heily
b9d0857acc Don't allow IRQs when pipeline is reloading
Former-commit-id: a51d3671dfabab422f2ad880b3cbe1bac65d442b
2019-11-16 18:17:53 +02:00
Michel Heily
b288625b9a Improve the debugger
- Add tracing of opcodes and potentially more stuff
- Add option to run a script file at the beginnig (I use it to redirect
traces to a file)
- Support breakpoints again


Former-commit-id: 4e988d6bc1a59456c96547f0320a6d9abedcae00
2019-11-16 18:17:53 +02:00
Michel Heily
7e98af80c2 Fixes to ALU, passing mGBA carry tests
Former-commit-id: 14a4293b2511c7c63a920e6344e89b209ca7c5ee
2019-11-16 18:17:53 +02:00
Michel Heily
1d088accb8 mGBA test suite now boots!
Fix tons of bug and reimplemented some of the core code.
Add a neat feature for debug builds:
When the cpu "swi 0x55" instruction, a breakpoint is triggered on the
host.


Former-commit-id: 959249df4374327d90b2503d7a45f8d5d27995a6
2019-11-12 18:22:00 +02:00
Michel Heily
c117cbe924 Make the debugger work again, but currently breakpoints are not supported.
Added memory write command and the ability to pause the debugger with Ctrl-C


Former-commit-id: 83d141fa191dadefb84f7c9de163631a69af8324
2019-11-12 18:22:00 +02:00
Michel Heily
3a1d5c10ce Fix many bugs, refactor many things..
Passing: Armwrestler, cpu_test by Dead_Body

Former-commit-id: 80d815d110c5341515dd01c476a0d7e25ecb66a8
2019-11-09 01:06:24 +02:00
Michel Heily
2bd8b56bc6 Fix that DAMN bug.
Long story short, I've been hunting this bug for a while now.
While passing armwresteler tests, I still had an emulation bug which
causeed libgcc's iprintf to produce bugged strings.

In order to find it, I've used https://github.com/fleroviux/NanoboyAdvance/
And patched it to produce a formatted log of every step of the execution
of iprintf:
{OPCODE} {PC} {R0} {R1} ... {R14} {FLAGS}
Did the same on my emulator and searched for differences.

Found out the a "CMP r3, #0x0" instruction turned off the carry flag
when it shouldn't. Found this sad function, the check I'm using for
carry flag is meaningless when done on signed integers. :sigh:


Former-commit-id: 871d2581921796dae9bf4f5fdaa45c6ad46aebec
2019-11-06 00:49:59 +02:00
Michel Heily
fa211fa77e Fix thumb NEG instruction. Finally pass armwrestler!
This one took me quite a bit. :/


Former-commit-id: f08537dda5a62076c3faff31a898c0a585102526
2019-09-10 01:01:49 +03:00
Michel Heily
ba9b4662d4 Fix SBC and RSC instructions
Needed to add 1-C and not substract 1-C


Former-commit-id: 339201a2cd41d777d3b3204995e698182032c80d
2019-08-31 14:10:05 +02:00
Michel Heily
acd0e4f338 cpu: Refactor instructions to use explicit cycle counting.
The way cycles were counted up untill now was not accurate enough,
I've avoided doing so because the instruction implementation looks
bloated this way, but I've had problems with cycle accuracy with tonc's
timer demo.

This is not entirely correct though, and I'm 100% sure there are some
mistakes, but works good enough for now.


Former-commit-id: 748faaf99fe2f42925c0a2110192c6a01e5d27d4
2019-08-08 20:05:09 +03:00
Michel Heily
d86cc87c79 Add WAITCNT, and refactor cycle calculation
Former-commit-id: e1ee5c9ce1f1db549fddd80907467da51e63b676
2019-08-07 09:50:33 +03:00
Michel Heily
c7dd713605 The big ioregs refactoring.
This commit refactors the ioregs:
* Use bitfield crate to implement the GPU ioregs.
* IoRegs are stored in their own variables bindings (i.e, Gpu related ioregs are now fields of the Gpu struct)
  - This optimize performance quiet alot from my testings - since every scanline was accessing deseralizing ioregs from sysbus. (Getting constant 59fps now)
* For now, comment out DMA model

Also, cleaned the code up to eliminate rustc warnings.


Former-commit-id: 9077695c446ebd1a71783acfdd9819245aa02d7a
2019-08-03 00:24:15 +03:00
Michel Heily
90edebbe82 Align to halfword for thumb branch long instructions
Former-commit-id: f75e4baf003dcb7c535db3692383cc95575dfd81
2019-07-29 01:55:16 +03:00
Michel Heily
e962150aaf Start working on Interrupts.
it kinda works now, but needs testing.


Former-commit-id: 8510314cce248a737d492d935cf5b48f86d920ed
2019-07-29 01:28:22 +03:00
Michel Heily
f39095a03b Fix thumb conditional branch offset
Former-commit-id: b42f233b7f2ca5d427b0e36860a305f7e1a26a1d
2019-07-27 21:30:27 +03:00
Michel Heily
df48f307f0 armwrestler-fix: Fix post indexed LDR_STR when rd==rn
Former-commit-id: b886c969c2d570fbb831eeeddc0f65ad575cfccb
2019-07-27 21:28:43 +03:00